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1 rev. 7/01/03 sp3239 intelligent +3.0v to +5.5v rs-232 transceiver ? copyright 2003 sipex corporation sp3239 intelligent +3.0v to +5.5v rs-232 transceivers the sp3239 device is an rs-232 transceiver solution intended for portable or hand-held applications such as notebook and palmtop computers. the sp3239 uses an internal high-efficiency, charge-pump power supply that requires only 0.1 f capacitors in 3.3v operation. this charge pump and sipex's driver architecture allow the sp3239 device to deliver compliant rs-232 performance from a single power supply ranging from +3.0v to +5.0v. the sp3239 is a 5-driver/3-receiver device, ideal for laptop/notebook computer and pda applications. the sp3239 includes one complementary receiver that remains alert to monitor an external device's ring indicate signal while the device is shutdown. meets true eia/tia-232-f standards from a +3.0v to +5.5v power supply interoperable with eia/tia-232 and adheres to eia/tia-562 down to a +2.7v power source minimum 250kbps data rate under load regulated charge pump yields stable rs-232 outputs regardless of v cc variations esd specifications: +2kv human body model description selection table applicable u.s. patents - 5,306,954; and other patents pending. e c i v e ds e i l p p u s r e w o p2 3 2 - s r s r e v i r d 2 3 2 - s r s r e v i e c e r l a n r e t x e s t n e n o p m o c e n i l - n o o t u a ? y r t i u c r i c e t a t s - 3 l t tf o . o n s n i p 3 2 2 3 p s v 5 . 5 + o t v 0 . 3 +22s r o t i c a p a c 4s e ys e y0 2 3 4 2 3 p s v 5 . 5 + o t v 0 . 3 +35s r o t i c a p a c 4s e ys e y8 2 8 3 2 3 p s v 5 . 5 + o t v 0 . 3 +53s r o t i c a p a c 4s e ys e y8 2 9 3 2 3 p s v 5 . 5 + o t v 0 . 3 +53s r o t i c a p a c 4o ns e y8 2 9 4 2 3 p s v 5 . 5 + o t v 0 . 3 +53s r o t i c a p a c 4o no n4 2 ? t 4 in 1 2 3 4 25 26 27 28 5 6 7 24 23 22 shutdown c2- v- r 1 in r 2 in r3in nc c2+ c1- gnd v cc v+ t 1 in 8 9 10 11 18 19 20 21 12 13 14 17 16 15 t 1 out t 2 out t 3 out t 3 in t 2 in t 5 in r 3 out r 2 out r 1 out r 1 out sp3239 c1+ t 4 out t 5 out nc features now available in lead free packaging
rev. 7/01/03 sp3239 intelligent +3.0v to +5.5v rs-232 transceiver ? copyright 2003 sipex corporation 2 absolute maximum ratings these are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device. v cc ...................................................... -0.3v to +6.0v v+ (note 1) ...................................... -0.3v to +7.0v v- (note 1) ....................................... +0.3v to -7.0v v+ + |v-| (note 1) ........................................... +13v i cc (dc v cc or gnd current) ......................... +100ma input voltages shutdown, .................................... .-0.3v to +6.0v rxin .................................................................. +25v output voltages txout ........................................................... +13.2v rxout ..................................... -0.3v to (v cc + 0.3v) short-circuit duration txout .................................................... continuous storage temperature ...................... -65 c to +150 c power dissipation per package 28-pin ssop (derate 11.2mw/ o c above +70 o c).................900mw 28-pin tssop (derate 13.2mw/ o c above +70 o c)...............1100mw electrical characteristics v cc = +3.0 to +5.5, c1 -c4 = 0.1 f (tested at 3.3v + 5%), c1-c4 = 0.22 f (tested at 3.3v + 10%), c1 = 0.047 f, and c2-c4 = 0.33 f (tested at 5.0v + 10%), t a = t min to t max , unless otherwise noted. typical values are at t a = +25 c.) note 1: v+ and v- can have maximum magnitudes of 7v, but their absolute difference cannot exceed 13v. r e t e m a r a p. n i m. p y t. x a ms t i n us n o i t i d n o c s c i t s i r e t c a r a h c c d n w o d t u h s , t n e r r u c y l p p u s0 . 10 1 a , d n g = n w o d t u h s v r o d n g = n i x t c c t n e r r u c y l p p u s3 . 00 . 1 a m v = n w o d t u h s c c , d a o l o n s t u p t u o r e v i e c e r d n a s t u p n i c i g o l d l o h s e r h t c i g o l t u p n i 4 . 2 8 . 0v v c c n i x t , v 0 . 5 + r o v 3 . 3 + = n w o d t u h s t n e r r u c e g a k a e l t u p n i+ 1 0 . 0+ 0 . 1 a n w o d t u h s , n i x t t a c 5 2 = t n e r r u c e g a k a e l t u p t u o+ 5 0 . 0+ 0 1 a d e l b a s i d s r e v i e c e r w o l e g a t l o v t u p t u o4 . 0vi t u o a m 6 . 1 = h g i h e g a t l o v t u p t u ov c c 6 . 0 -v c c 1 . 0 -vi t u o a m 0 . 1 - =
3 rev. 7/01/03 sp3239 intelligent +3.0v to +5.5v rs-232 transceiver ? copyright 2003 sipex corporation electrical characteristics v cc = +3.0 to +5.5, c1 -c4 = 0.1 f (tested at 3.3v + 5%), c1-c4 = 0.22 f (tested at 3.3v + 10%), c1 = 0.047 f, and c2-c4 = 0.33 f (tested at 5.0v + 10%), t a = t min to t max , unless otherwise noted. typical values are at t a = +25 c.) r e t e m a r a p. n i m. p y t. x a ms t i n us n o i t i d n o c s t u p t u o r e v i r d g n i w s e g a t l o v t u p t u o0 . 5 4 . 5 v k 3 h t i w d e d a o l s t u p t u o r e v i r d l l a ? d n g o t e c n a t s i s e r t u p t u o0 0 3 ? v c c v , v 0 = - v = + v = t u o v 2 = t n e r r u c t i u c r i c - t r o h s t u p t u o5 3 0 6 a mv t u o d n g = s t u p n i r e v i e c e r e g n a r e g a t l o v t u p n i5 2 -5 2v w o l d l o h s e r h t t u p n i6 . 02 . 1vv c c v 3 . 3 = w o l d l o h s e r h t t u p n i8 . 05 . 1vv c c v 0 . 5 = h g i h d l o h s e r h t t u p n i5 . 14 . 2vv c c v 3 . 3 = h g i h d l o h s e r h t t u p n i8 . 14 . 2vv c c v 0 . 5 = s i s e r e t s y h t u p n i5 . 0v e c n a t s i s e r t u p n i357k ? s c i t s i r e t c a r a h c g n i m i t e t a r a t a d m u m i x a m0 5 2s p b kr l k 3 = , ? c l r e v i r d e n o , f p 0 0 0 1 = g n i h c t i w s y a l e d n o i t a g a p o r p r e v i e c e r t l h p t h l p 5 1 . 0 5 1 . 0 s , t u p t u o r e v i e c e r o t t u p n i r e v i e c e r c l f p 0 5 1 = e m i t e l b a n e t u p t u o r e v i e c e r0 0 2s nn o i t a r e p o l a m r o n e m i t e l b a s i d t u p t u o r e v i e c e r0 0 2s nn o i t a r e p o l a m r o n w e k s r e v i r d0 0 1s nt i h l p t - l h p t , i a 5 2 = o c w e k s r e v i e c e r0 5s nt i h l p t - l h p i e t a r w e l s n o i g e r - n o i t i s n a r t0 3/ v sv c c r , v 3 . 3 = l k 3 = , ? t b m a 5 2 = o , c o t v 0 . 3 - m o r f n e k a t s t n e m e r u s a e m v 0 . 3 - o t v 0 . 3 + r o v 0 . 3 +
rev. 7/01/03 sp3239 intelligent +3.0v to +5.5v rs-232 transceiver ? copyright 2003 sipex corporation 4 typical perfomance characteristics unless otherwise noted, the following perfomance characteristics apply for v cc = +3.3v, 250kbps data rate, all drivers loaded with 3k ? , 0.1 f charge pump capacitors, and t amb = +25 c. transmitter output vs. load capacitance -6 -4 -2 0 2 4 6 0 1000 2000 3000 4000 5000 pf voh vol slew rate vs. load capacitance 0 5 10 15 20 25 0 1000 2000 3000 4000 5000 pf pos. sr neg sr figure 3. supply current vs. load capacitance when transmitting data supply current vs load capacitance 0 10 20 30 40 50 60 0 1000 2000 3000 4000 5000 pf 250kbps 120kbps 20kbps
5 rev. 7/01/03 sp3239 intelligent +3.0v to +5.5v rs-232 transceiver ? copyright 2003 sipex corporation table 1. device pin description e m a nn o i t c n u f n i p . o n + 2 c . 2 c r o t i c a p a c p m u p - e g r a h c l a c i r t e m m y s e h t f o l a n i m r e t e v i t i s o p 1 d n g. d n u o r g 2 - 2 c . 2 c r o t i c a p a c p m u p - e g r a h c l a c i r t e m m y s e h t f o l a n i m r e t e v i t a g e n 3 - v. p m u p e g r a h c e h t y b d e t a r e n e g t u p t u o v 5 . 5 - d e t a l u g e r 4 t 1 t u o. t u p t u o r e v i r d 2 3 2 - s r 5 t 2 t u o. t u p t u o r e v i r d 2 3 2 - s r 6 t 3 t u o. t u p t u o r e v i r d 2 3 2 - s r 7 r 1 n i. t u p n i r e v i e c e r 2 3 2 - s r 8 r 2 n i. t u p n i r e v i e c e r 2 3 2 - s r 9 t 4 t u o. t u p t u o r e v i r d 2 3 2 - s r 0 1 r 3 n i. t u p n i r e v i e c e r 2 3 2 - s r 1 1 t 5 t u o. t u p t u o r e v i r d 2 3 2 - s r 2 1 c n. t c e n n o c o n 3 1 n w o d t u h s. p m u p e g r a h c d n a s r e v i r d n w o d t u h s o t w o l c i g o l y l p p a 4 1 c n. n o i t a r e p o l a m r o n r o f h g i h e i t r o t c e n n o c o n 5 1 r 1 t u o. n w o d t u h s n i e v i t c a , t u p t u o 1 - r e v i e c e r g n i t r e v n i - n o n 6 1 t 5 n i. t u p n i r e v i r d s o m c / l t t 7 1 r 3 t u o. t u p t u o r e v i e c e r s o m c / l t t 8 1 t 4 n i. t u p n i r e v i r d s o m c / l t t 9 1 r 2 t u o. t u p t u o r e v i e c e r s o m c / l t t 0 2 r 1 t u o. t u p t u o r e v i e c e r s o m c / l t t 1 2 t 3 n i. t u p n i r e v i r d s o m c / l t t 2 2 t 2 n i. t u p n i r e v i r d s o m c / l t t 3 2 t 1 n i. t u p n i r e v i r d s o m c / l t t 4 2 - 1 c . 1 c r o t i c a p a c p m u p - e g r a h c l a c i r t e m m y s e h t f o l a n i m r e t e v i t a g e n 5 2 v c c . e g a t l o v y l p p u s v 5 . 5 + o t v 0 . 3 + 6 2 + v. p m u p e g r a h c e h t y b d e t a r e n e g t u p t u o v 5 . 5 + d e t a l u g e r 7 2 + 1 c 1 c r o t i c a p a c p m u p - e g r a h c r e l b u o d e g a t l o v e h t f o l a n i m r e t e v i t i s o p 8 2 pin description
rev. 7/01/03 sp3239 intelligent +3.0v to +5.5v rs-232 transceiver ? copyright 2003 sipex corporation 6 figure 5. sp3239 typical operating circuit figure 4. sp3239 pinout configuration t 4 in 1 2 3 4 25 26 27 28 5 6 7 24 23 22 shutdown c2- v- r 1 in r 2 in r3in nc c2+ c1- gnd v cc v+ t 1 in 8 9 10 11 18 19 20 21 12 13 14 17 16 15 t 1 out t 2 out t 3 out t 3 in t 2 in t 5 in r 3 out r 2 out r 1 out r 1 out sp3239 c1+ t 4 out t 5 out nc sp3239 28 25 3 1 27 4 26 gnd c1+ c1- c2+ c2- v+ v- v cc 0.1 f 0.1 f 0.1 f + c2 c5 c1 + + c3 c4 + + 0.1 f 0.1 f 14 v cc v cc 2 shutdown 5k ? 5k ? 5k ? 16 21 20 18 8 9 11 rs-232 inputs ttl/cmos outputs r 1 out r 1 in r 1 out r 2 in r 3 in r 2 out r 3 out 24 23 22 5 6 7 rs-232 outputs ttl/cmos inputs t 1 in t 2 out t 2 in t 3 in t 3 out t 1 out 19 17 10 12 t 4 out t 4 in t 5 in t 5 out
7 rev. 7/01/03 sp3239 intelligent +3.0v to +5.5v rs-232 transceiver ? copyright 2003 sipex corporation description the sp3239 device meets the eia/tia-232 and itu-t v.28/v.24 communication protocols and can be implemented in battery-powered, por- table, or hand-held applications such as notebook or palmtop computers. the sp3239 device features sipex's proprietary and patented (u.s. #5,306,954) on-board charge pump circuitry that generates 5.5v rs-232 voltage levels from a single +3.0v to +5.5v power supply. the sp3239 device can guarantee a data rate of 250kbps fully loaded. the sp3239 is a 5-driver/3-receiver device, ideal for portable or hand-held applications. the sp3239 includes one complementary always-active receiver that can monitor an external device (such as a modem) in shutdown. this aids in protecting the uart or serial controller ic by preventing forward biasing of the protection diodes where v cc may be disconnected. the sp3239 device is an ideal choice for power sensitive designs. theory of operation the sp3239 device is made up of four basic circuit blocks: 1. drivers, 2. receivers, 3. the sipex proprietary charge pump, and drivers the drivers are inverting level transmitters that convert ttl or cmos logic levels to 5.0v eia/ tia-232 levels with an inverted sense relative to the input logic levels. typically, the rs-232 output voltage swing is + 5.4v with no load and +5v minimum fully loaded. the driver outputs are protected against infinite short-circuits to ground without degradation in reliability. these drivers comply with the eia-tia-232f and all previous rs-232 versions. all unused driver inputs must be connected to v cc or gnd. the drivers can guarantee a data rate of 250kbps fully loaded with 3k ? in parallel with 1000pf, ensuring compatibility with pc-to-pc commu- nication software. the slew rate of the driver output is internally limited to a maximum of 30v/ s in order to meet the eia standards (eia rs-232d 2.1.7, paragraph 5). the transition of the loaded output from high to low also meets the monotonicity requirements of the standard. figure 7 shows a loopback test circuit used to test the rs-232 drivers. figure 8 shows the test results of the loopback circuit with all five driv- ers active at 120kbps with typical rs-232 loads in parallel with 1000pf capacitors. figure 6 shows the test results where one driver was active at 250kbps and all five drivers loaded with an rs- 232 receiver in parallel with a 1000pf capacitor. a solid rs-232 data transmission rate of 120kbps provides compatibility with many designs in personal computer peripherals and lan appli- cations. figure 6. interface circuitry controlled by microprocessor supervisory circuit sp3239 28 25 3 1 27 4 26 gnd c1+ c1- c2+ c2- v+ v- v cc 0.1 f 0.1 f 0.1 f + c2 c5 c1 + + c3 c4 + + 0.1 f 0.1 f 14 v cc 2 shutdown p supervisor ic v cc v in reset 5k ? 5k ? 5k ? 24 23 22 16 21 20 18 5 6 7 8 9 11 rs-232 outputs rs-232 inputs t 1 in r 1 out r 1 in t 2 out r 1 out t 2 in t 3 in t 3 out t 1 out r 2 in r 3 in r 2 out r 3 out uart or serial c txd rts dtr rxd cts dsr dcd ri 19 17 10 12 t 4 out t 4 in t 5 in t 5 out
rev. 7/01/03 sp3239 intelligent +3.0v to +5.5v rs-232 transceiver ? copyright 2003 sipex corporation 8 receivers the receivers convert 5.0v eia/tia-232 levels to ttl or cmos logic output levels. the truth table logic of the driver and receiver outputs can be found in table 2. the sp3239 includes an additional non- inverting receiver with an output r 1 out. r 1 out is an extra output that remains active and monitors activity while the other receiver outputs are forced into high impedance. this allows ring indicator (ri) from a peripheral to be monitored without forward biasing the ttl/cmos inputs of the other devices connected to the receiver outputs. since receiver input is usually from a transmission line where long cable lengths and system interference can degrade the signal, the inputs have a typical hysteresis margin of 500mv. this ensures that the receiver is virtually immune to noisy transmission lines. should an input be left unconnected, an internal 5k ? pulldown resistor to ground will commit the output of the receiver to a high state. charge pump the charge pump is a sipex?atented design (u.s. #5,306,954) and uses a unique approach compared to older less?fficient designs. the figure 7. loopback test circuit for rs-232 driver data transmission rates charge pump still requires four external capacitors, but uses a four?hase voltage shifting technique to attain symmetrical 5.5v power supplies. the internal power supply consists of a regulated dual charge pump that provides output voltages 5.5v regardless of the input voltage (v cc ) over the +3.0v to +5.5v range. this is important to maintain compliant rs-232 levels regardless of power supply fluctuations. the charge pump operates in a discontinuous mode using an internal oscillator. if the output figure 8. loopback test circuit result at 120kbps (all drivers fully loaded) figure 9. loopback test circuit result at 250kbps (all drivers fully loaded) sp3239 txin txout c1+ c1- c2+ c2- v+ v- v cc 0.1 f 0.1 f 0.1 f + c2 c5 c1 + + c3 c4 + + 0.1 f 0.1 f logic inputs v cc 5k ? rxin rxout logic outputs shutdown gnd v cc 1000pf
9 rev. 7/01/03 sp3239 intelligent +3.0v to +5.5v rs-232 transceiver ? copyright 2003 sipex corporation voltages are less than a magnitude of 5.5v, the charge pump is enabled. if the output voltages exceed a magnitude of 5.5v, the charge pump is disabled. this oscillator controls the four phases of the voltage shifting (figure 12). a descrip- tion of each phase follows. phase 1 (figure 10) ?v ss charge storage ?during this phase of the clock cycle, the positive side of capacitors c 1 and c 2 are initially charged to v cc . c l + is then switched to gnd and the charge in c 1 is transferred to c 2 . since c 2 + is connected to v cc , the voltage potential across capacitor c 2 is now 2 times v cc . phase 2 (figure 11) ?v ss transfer ?phase two of the clock connects the negative terminal of c 2 to the v ss storage capacitor and the positive terminal of c 2 to gnd. this transfers a negative generated voltage to c 3 . this generated voltage is regulated to a minimum voltage of -5.5v. simultaneous with the transfer of the voltage to c 3 , the positive side of capacitor c 1 is switched to v cc and the negative side is connected to gnd. phase 3 (figure 13) ?v dd charge storage ?the third phase of the clock is identical to the first phase ?the charge transferred in c 1 produces ? cc in the negative terminal of c 1 , which is applied to the negative side of capacitor c 2 . since c 2 + is at v cc , the voltage potential across c 2 is 2 times v cc . phase 4 (figure 14) ?v dd transfer ?the fourth phase of the clock connects the negative terminal of c 2 to gnd, and transfers this positive generated voltage across c 2 to c 4 , the v dd storage capacitor. this voltage is regulated to +5.5v. at this voltage, the internal oscillator is disabled. simultaneous with the transfer of the voltage to c 4 , the positive side of capacitor c 1 is switched to v cc and the negative side is connected to gnd, allowing the charge pump cycle to begin again. the charge pump cycle will continue as long as the operational conditions for the internal oscillator are present. since both v + and v are separately generated from v cc , in a no?oad condition v + and v will be symmetrical. older charge pump approaches that generate v from v + will show a decrease in the magnitude of v compared to v + due to the inherent inefficiencies in the design. the clock rate for the charge pump typically operates at 500khz. the external capacitors can be as low as 0.1 f with a 16v breakdown voltage rating.
rev. 7/01/03 sp3239 intelligent +3.0v to +5.5v rs-232 transceiver ? copyright 2003 sipex corporation 10 figure 12. charge pump waveforms figure 13. charge pump ?phase 3 v cc = +5v ?v +5v ?v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + ++ figure 14. charge pump ?phase 4 v cc = +5v +10v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + ++ ch1 2.00v ch2 2.00v m 1.00 s ch1 1.96v 2 1 t t [] t 2 +6v a) c 2+ b) c 2 - -6v 0v 0v figure 11. charge pump ?phase 2 v cc = +5v ?0v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + ++ v cc = +5v ?v ?v +5v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + ++ figure 10. charge pump ?phase 1
11 rev. 7/01/03 sp3239 intelligent +3.0v to +5.5v rs-232 transceiver ? copyright 2003 sipex corporation figure 15. circuit for the connectivity of the sp3239 with a db-9 connector 6. dce ready 7. request to send 8. clear to send 9. ring indicator db-9 connector pins: 1. received line signal detector 2. received data 3. transmitted data 4. data terminal ready 5. signal ground (common) 6 7 8 9 1 2 3 4 5 db-9 connector 26 v cc 0.1 f c5 + 0.1 f 0.1 f v cc gnd 2 8 9 11 5k ? 5k ? 5k ? 16 21 20 18 5 6 7 r 1 out r 1 in r 1 out r 2 in r 3 in r 2 out r 3 out 10 12 24 23 22 t 1 in t 2 out t 2 in t 3 in t 3 out t 1 out 19 17 t 4 out t 4 in t 5 in t 5 out sp3239 28 25 3 1 27 4 c3 c4 + + c1+ c1- c2+ c2- v+ v- 0.1 f 0.1 f + c2 c1 + 14 v cc shutdown table 2. shutdown logic n w o d t u h s t u p n i t a l a n g i s 2 3 2 - s r t u p n i r e v i e c e r t x t u or x t u or 1 t u o r e v i e c s n a r t s u t a t s h g i hs e ye v i t c ae v i t c ae v i t c an o i t a r e p o l a m r o n w o ls e yz - h g i hz - h g i he v i t c an w o d t u h s w o lo nz - h g i hz - h g i he v i t c an w o d t u h s
rev. 7/01/03 sp3239 intelligent +3.0v to +5.5v rs-232 transceiver ? copyright 2003 sipex corporation 12 esd tolerance the sp3239 device incorporates ruggedized esd cells on all driver output and receiver input pins. the esd structure is improved over our previous family for more rugged applications and environments sensitive to electro-static discharges and associated transients. the human body model has been the generally accepted esd testing method for semiconductors. this method is also specified in mil-std-883, method 3015.7 for esd testing. the premise of this esd test is to simulate the human body? figure 16. esd test circuit for human body model r c c s r s sw1 sw2 r c device under t est dc power source c s r s sw1 sw2 potential to store electro-static energy and discharge it to an integrated circuit. the simulation is performed by using a test model as shown in figure 19. this method will test the ic? capability to withstand an esd transient during normal handling such as in manufacturing areas where the ics tend to be handled frequently. for the human body model, the current limiting resistor (r s ) and the source capacitor (c s ) are 1.5k ? and 100pf, respectively.
13 rev. 7/01/03 sp3239 intelligent +3.0v to +5.5v rs-232 transceiver ? copyright 2003 sipex corporation package: 28 pin ssop b c with lead finish base metal seating plane a2 a a1 see detail ?a? l1 l seaing plane 2 nx r r1 a a detail a gauge plane section a-a d index area d 2 x 2 e1 n 1 2 e1 e b symbol min nom max a--2 a1 0.05 - - a2 1.65 1.75 1.85 b0.22- 0.38 c0.09- 0.25 d9.9 10.2 10.5 e7.47. 88.2 e1 5 5.3 5.6 l0.550 .75 0.95 l1 ?0o4 o8o note: dimensions in (mm) 28 pin ssop jedec mo-150 (ah) variation 1.25 ref
rev. 7/01/03 sp3239 intelligent +3.0v to +5.5v rs-232 transceiver ? copyright 2003 sipex corporation 14 seating plane a2 a a1 b see detail ?a? b b seaing plane l1 l ?1 detail a ?2 ?3 c b section b-b e1 e d index area d 2 x 2 e1 12 e symbol min nom max a-- 1.2 a1 0.05 - 0.15 a2 0.8 1 1.05 b 0.19 - 0.3 c 0.09 - 0.2 d 9.6 9.7 9.8 e e e1 4.3 4.4 4.5 l 0.45 0.6 0.75 l1 ?1 0o - 8o ?2 ?3 note: dimensions in (mm) 12o ref 12o ref 28 pin tssop jedec mo-153 (ae) variation 6.40 bsc 1.00 ref 0.65 bsc package: 28 pin tssop
15 rev. 7/01/03 sp3239 intelligent +3.0v to +5.5v rs-232 transceiver ? copyright 2003 sipex corporation model temperature range package types sp3239ca 0 c to +70 c 28-pin ssop sp3239ca/tr 0 c to +70 c 28-pin ssop sp3239cy 0 c to +70 c 28-pin tssop sp3239cy/tr 0 c to +70 c 28-pin tssop sp3239ea -40 c to +85 c 28-pin ssop sp3239ea/tr -40 c to +85 c 28-pin ssop sp3239ey -40 c to +85 c 28-pin tssop sp3239ey/tr -40 c to +85 c 28-pin tssop ordering information corporation analog excellence sipex corporation reserves the right to make changes to any products described herein. sipex does not assume any liability aris ing out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor t he rights of others. sipex corporation headquarters and sales office 233 south hillview drive milpitas, ca 95035 tel: (408) 934-7500 fax: (408) 935-7600 available in lead free packaging. to order add ?-l? suffix to part number. example: sp3239ey/tr = standard; sp3239ey-l/tr = lead free /tr = tape and reel pack quantity is 1,500 for ssop or tssop. click here to order samples

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